connection diagram plastic mini-dip (n) cerdip (q) and plastic soic (r) packages top view output Cin 1 in v 1 output Cin 1 in vC ad706 1 2 3 4 8 7 6 5 amplifier 1 amplifier 2 a ad706 feature high dc precision 50 m v max offset voltage 0.6 m v/ 8 c max offset drift 110 pa max input bias current low noise 0.5 m v p-p voltage noise, 0.1 hz to 10 hz low power 750 m a supply current available in 8-lead plastic mini-dlp, hermetic cerdip and surface mount (soic) packages available in tape and reel in accordance with eia-481a standard single version: ad705, quad version: ad704 primary applications low frequency active filters precision instrumentation precision integrators product description the ad706 is a dual, low power, bipolar op amp that has the low input bias current of a bifet amplifier, but which offers a significantly lower i b drift over temperature. it utilizes superbeta bipolar input transistors to achieve picoampere input bias cur- rent levels (similar to fet input amplifiers at room tempera- ture), while its i b typically only increases by 5 at 125 c (unlike a bifet amp, for which i b doubles every 10 c for a 1000 increase at 125 c). the ad706 also achieves the microvolt offset voltage and low noise characteristics of a precision bipolar input amplifier. since it has only 1/20 the input bias current of an op07, the ad706 does not require the commonly used balancing resis- tor. furthermore, the current noise is 1/5 that of the op07, which makes this amplifier usable with much higher source impedances. at 1/6 the supply current (per amplifier) of the op07, the ad706 is better suited for todays higher density boards. the ad706 is an excellent choice for use in low frequency active filters in 12- and 14-bit data acquisition systems, in preci- sion instrumentation and as a high quality integrator. the ad706 is internally compensated for unity gain and is available in five performance grades. the ad706j and ad706k are rated over the commercial temperature range of 0 c to +70 c. the ad706a and ad706b are rated over the industrial temperature range of C40 c to +85 c. the ad706 is offered in three varieties of an 8-lead package: plastic mini-dip, hermetic cerdip and surface mount (soic). j grade chips are also available. product highlights 1. the ad706 is a dual low drift op amp that offers bifet level input bias currents, yet has the low i b drift of a bipolar amplifier. it may be used in circuits using dual op amps such as the lt1024. 2. the ad706 provides both low drift and high dc precision. 3. the ad706 can be used in applications where a chopper amplifier would normally be required but without the choppers inherent noise. dual picoampere input current bipolar op amp one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 world wide web site: http://www.analog.com fax: 781/326-8703 ? analog devices, inc., 1997 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. temperature C 8 c 100 0.01 typical i b C na 1 0.1 10 C55 +125 +25 +110 typical jfet amp ad706 figure 1. input bias current vs. temperature
ad706Cspecifications ad706j/a ad706k/b parameter conditions min typ max min typ max units input offset voltage initial offset 30 100 10 50 m v offset t min to t max 40 150 25 100 m v vs. temp, average tc 0.2 1.5 0.2 0.6 m v/ c vs. supply (psrr) v s = 2 v to 18 v 110 132 112 132 db t min to t max v s = 2.5 v to 18 v 106 126 108 126 db long term stability 0.3 0.3 m v/month input bias current 1 v cm = 0 v 50 200 30 110 pa v cm = 13.5 v 250 160 pa vs. temp, average tc 0.3 0.2 pa/ c t min to t max v cm = 0 v 300 200 pa t min to t max v cm = 13.5 v 400 300 pa input offset current v cm = 0 v 30 150 30 100 pa v cm = 13.5 v 250 200 pa vs. temp, average tc 0.6 0.4 pa/ c t min to t max v cm = 0 v 80 250 80 200 pa t min to t max v cm = 13.5 v 80 350 80 300 pa matching characteristics offset voltage 150 75 m v t min to t max 250 150 m v input bias current 2 300 150 pa t min to t max 500 250 pa common-mode rejection 106 110 db t min to t max 106 108 db power supply rejection 106 110 db t min to t max 104 106 db crosstalk @ f = 10 hz (figure 19a) r l = 2 k w 150 150 db frequency response unity gain crossover frequency 0.8 0.8 mhz slew rate g = C1 0.15 0.15 v/ m s t min to t max 0.15 0.15 v/ m s input impedance differential 40 i 2 40 i 2m w i pf common mode 300 i 2 300 i 2g w i pf input voltage range common-mode voltage 13.5 14 13.5 14 v common-mode rejection ratio v cm = 13.5 v 110 132 114 132 db t min to t max 108 128 108 128 db input current noise 0.1 hz to 10 hz 3 3 pa p-p f = 10 hz 50 50 fa/ ? hz input voltage noise 0.1 hz to 10 hz 0.5 0.5 1.0 m v p-p f = 10 hz 17 17 nv/ ? hz f = 1 khz 15 22 15 22 nv/ ? hz open-loop gain v o = 12 v r load = 10 k w 200 2000 400 2000 v/mv t min to t max 150 1500 300 1500 v/mv v o = 10 v r load = 2 k w 200 1000 300 1000 v/mv t min to t max 150 1000 200 1000 v/mv output characteristics voltage swing r load = 10 k w 13 14 13 14 v t min to t max 13 14 13 14 v current short circuit 15 15 ma capacitive load drive capability gain = +1 10,000 10,000 pf (@ t a = +25 8 c, v cm = 0 v and 6 15 v dc, unless otherwise noted) rev. c C2C
ad706j/a ad706k/b parameter conditions min typ max min typ max units power supply rated performance 15 15 v operating range 2.0 18 2.0 18 v quiescent current, total 0.75 1.2 0.75 1.2 ma t min to t max 0.8 1.4 0.8 1.4 ma transistor count # of transistors 90 90 notes l bias current specifications are guaranteed maximum at either input. 2 input bias current match is the difference between corresponding inputs (i b of Cin of amplifier #1 minus i b of Cin of amplifier #2). cmrr match is the difference between d v os # 1 d v cm for amplifier #1 and d v os # 2 d v cm for amplifier #2 expressed in db. psrr match is the difference between d v os # 1 d v supply for amplifier #l and d v os # 2 d v supply for amplifier #2 expressed in db. all min and max specifications are guaranteed. specifications subject to change without notice. ad706 absolute maximum ratings l supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v internal power dissipation (total: both amplifiers) 2 . . . . . . . . . . . . . . . . . . . . 650 mw input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v s differential input voltage 3 . . . . . . . . . . . . . . . . . . . . +0.7 volts output short circuit duration . . . . . . . . . . . . . . . . indefinite storage temperature range (q) . . . . . . . . . C65 c to +150 c storage temperature range (n, r) . . . . . . . C65 c to +125 c operating temperature range ad706j/k . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 c to +70 c ad706a/b . . . . . . . . . . . . . . . . . . . . . . . . . C40 c to +85 c lead temperature (soldering 10 secs) . . . . . . . . . . . . +300 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 specification is for device in free air: 8-lead plastic package: q ja = 100 c/watt 8-lead cerdip package: q ja = 110 c/watt 8-lead small outline package: q ja = 155 c/watt 3 the input pins of this amplifier are protected by back-to-back diodes. if the differential voltage exceeds 0.7 volts, external series protection resistors should be added to limit the input current to less than 25 ma. ordering guide temperature package model range description option* ad706an C40 c to +85 c plastic dip n-8 ad706jn 0 c to +70 c plastic dip n-8 ad706kn 0 c to +70 c plastic dip n-8 ad706jr 0 c to +70 c soic r-8 ad706jr-reel 0 c to +70 c tape and reel ad706aq C40 c to +85 c cerdip q-8 AD706BQ C40 c to +85 c cerdip q-8 ad706ar C40 c to +85 c soic r-8 ad706ar-reel C40 c to +85 c tape and reel *n = plastic dip; q = cerdip, r = small outline package. caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad706 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. metalization photograph dimensions shown in inches and (mm). contact factory for latest dimensions. rev. c C3C
ad706Ctypical characteristics (@ +25 8 c, v s = 6 15 v, unless otherwise noted) rev. c C4C sample size: 3000 input offset voltage C m v number of units 1000 0 C80 C40 0 40 80 400 200 600 800 figure 2. typical distribution of input offset voltage supply voltage C 6 volts 1 v s 0 5101520 C1.5 C1.0 C0.5 1 1.0 1 0.5 1 1.5 input common-mode voltage limit C volts (referred to supply voltages) Cv s figure 5. input common-mode voltage range vs. supply voltage offset voltage drift C m v/ 8 c 200 0 C0.8 C0.4 0 0.4 0.8 80 40 120 160 sample size: 375 C55 8 c to 1 125 8 c number of units figure 8. typical distribution of offset voltage drift input bias current C p a number of units 1000 0 C160 C80 0 80 160 400 200 600 800 sample size: 5100 figure 3. typical distribution of input bias current frequency C hz output voltage C volts p-p 35 30 0 1k 10k 1m 100k 25 20 15 10 5 figure 6. large signal frequency response warm-up time C minutes 4 0 0 1234 2 3 1 change in offset voltage C m v 5 figure 9. change in input offset voltage vs. warm-up time input offset current C p a number of units 1000 0 C120 C60 0 60 120 400 200 600 800 sample size: 2400 figure 4. typical distribution of input offset current source resistance C v offset voltage drift C m v/ 8 c 100 10 0.1 1k 10k 100m 1.0 100k 1m 10m source resistance may be either balanced or unbalanced for industrial temperature range figure 7. offset voltage drift vs. source resistance common-mode voltage C volts 60 C60 C15 C10 C5 0 5 20 40 0 input bias current C pa 10 C20 C40 15 negative i b positive i b figure 10. input bias current vs. common-mode voltage
ad706 rev. c C5C frequency C hz 1000 100 1 1 10 1000 100 10 voltage noise C nv/ ! hz figure 11. input noise voltage spectral density supply voltage C 6 volts 1000 600 0 5101520 800 900 700 quiescent current C m a +125 8 c C55 8 c +25 8 c figure 14. quiescent supply current vs. supply voltage load resistance C k v open-loop voltage gain 10m 1m 100k 1 2 4 6 8 10 100 +125 8 c +25 8 c C55 8 c figure 17. open-loop gain vs. load resistance vs. load resistance frequency C hz 1000 100 1 1 10 1000 100 10 current noise C fa/ ! hz 100 v 10k v 20m v v out figure 12. input noise current spectral density frequency C hz +160 0 0.1 1 10 100 10k +120 +140 +100 100k +80 cmrr C db +60 1m +40 +20 1k figure 15. common-mode rejection ratio vs. frequency frequency C hz 140 C20 0.01 0.1 1 10 1k 100 120 80 10k 60 40 1m 20 0 100 open-loop voltage gain C db 100k 10m gain phase 0 30 60 90 120 150 180 phase shift C de g rees 210 240 figure 18. open-loop gain and phase shift vs. frequency
ad706 rev. c C6C frequency C hz C80 C160 10 100 1k 10k 100k C120 C100 C140 crosstalk C db figure 20a. crosstalk vs. frequency 3 2 4 1 sine wave generator 1/2 ad706 0.1 m f +v s 0.1 m f r l 2k v Cv s 20v p-p v out #1 20k v 6 5 7 8 1 m f 0.1 m f +v s 2.21k v crosstalk = 20 log 10 C20db v out #2 v out #2 v out #1 1/2 ad706 figure 20b. crosstalk test circuit frequency C hz 1000 0.1 1 10 100 1k 10k 10 100 1 closed-loop output impedance C v 0.001 0.01 100k av = C1000 av = + 1 i out = +1ma figure 21. magnitude of closed-loop output impedance vs. frequency 4 0.1 m f +v s 8 1/2 ad706 v in 0.1 m f r l 2k v c l v out r f square wave input Cv s figure 22a. unity gain follower (for large signal applications, resistor r f limits the current through the input protection diodes) figure 22b. unity gain follower large signal pulse response, r f = 10 k w , c l = 1,000 pf figure 22c. unity gain follower small signal pulse response, r f = 0 w , c l = 100 pf figure 22d. unity gain follower small signal pulse response, r f = 0 w , c l = 1000 pf
ad706 rev. c C7C figure 24 shows an in-amp circuit that has the obvious advan- tage of requiring only one ad706, rather than three op amps, with subsequent savings in cost and power consumption. the transfer function of this circuit (without r g ) is: v out = ( v in #1 - v in #2 )1 + r 4 r 3 ? ? ? ? for r1 = r4 and r2 = r3 input resistance is high, thus permitting the signal source to have an unbalanced output impedance. +v s 0.1 m f 1k v + C a1 ad706 1/2 r p * 1k v 49.9k v r2 r3 r4 v in#1 r g (optional) r1 49.9k v a2 + C 0.1 m f ad706 1/2 output *optional input protection resistor for gains greater than 100 or input voltages exceeding the supply voltage. v out = (v in#1 C v in#2 ) (1+ ) + ( ) for r1 = r4, r2 = r3 r4 r3 2r4 r g Cv s r p * v in#2 3 2 8 1 5 6 7 4 figure 24. a two op-amp instrumentation amplifier furthermore, the circuit gain may be fine trimmed using an optional trim resistor, r g . like the three op-amp circuit, cmr figure 23a. unity gain inverter connection figure 23b. unity gain inverter large signal pulse response, c l = 1,000 pf figure 23c. unity gain inverter small signal pulse response, c l = 100 pf figure 23d. unity gain inverter small signal pulse response, c l = 1000 pf increases with gain, once initial trimming is accomplishedbut cmr is still dependent upon the ratio matching of resistors r1 through r4. resistor values for this circuit, using the optional gain resistor, r g , can be calculated using: r 1 = r 4 = 49.9 k w r 2 = r 3 = 49.9 k w 0.9 g - 1 r g = 99.8 k w 0.06 g where g = desired circuit gain table i provides practical 1% resistance values. (note that without resistor r g , r2 and r3 = 49.9 k w /gC1.) table i. operating gains of amplifiers a1 and a2 and practical 1% resistor values for the circuit of figure 24 circuit gain gain of a1 gain of a2 r2, r3 r1, r4 1.10 11.00 1.10 499 k w 49.9 k w 1.33 4.01 1.33 150 k w 49.9 k w 1.50 3.00 1.50 100 k w 49.9 k w 2.00 2.00 2.00 49.9 k w 49.9 k w 10.1 1.11 10.10 5.49 k w 49.9 k w 101.0 1.01 101.0 499 w 49.9 k w 1001 1.001 1001 49.9 w 49.9 k w for a much more comprehensive discussion of in-amp applica- tions, refer to the instrumentation amplifier applications guide available free from analog devices, inc. 10k v + ad706 + 0.1f 8 4 v in v out C +v s 10k v c l 1/2 0.1 m f r l 2.5k v square wave input Cv s
ad706 rev. c C8C c1429bC2C12/97 printed in u.s.a. a 1 hz, 4-pole, active filter figure 25 shows the ad706 in an active filter application. an important characteristic of the ad706 is that both the input bias current, input offset current and their drift remain low over most of the op amps rated temperature range. therefore, for most applications, there is no need to use the normal balancing resistor. adding the balancing resistor enhances performance at high temperatures, as shown by figure 26. table ii. 1 hz, 4-pole, low pass filter recommended component values section 1 section 2 desired low frequency frequency c1 c2 c3 c4 pass response (hz) q (hz) q ( m f) ( m f) ( m f) ( m f) bessel 1.43 0.522 1.60 0.806 0.116 0.107 0.160 0.0616 butterworth 1.00 0.541 1.00 1.31 0.172 0.147 0.416 0.0609 0.1 db chebychev 0.648 0.619 0.948 2.18 0.304 0.198 0.733 0.0385 0.2 db chebychev 0.603 0.646 0.941 2.44 0.341 0.204 0.823 0.0347 0.5 db chebychev 0.540 0.705 0.932 2.94 0.416 0.209 1.00 0.0290 1.0 db chebychev 0.492 0.785 0.925 3.56 0.508 0.206 1.23 0.0242 note specified values are for a C3 db point of 1.0 hz. for other frequencies simply scale capacitors c1 through c4 directly, i.e.: f or 3 hz bessel response, c1 = 0.0387 m f, c2 = 0.0357 m f, c3 = 0.0533 m f, c4 = 0.0205 m f. outline dimensions dimensions shown in inches and (mm). cerdip (q-8) output *without the network, pins 1 & 2, and 6 & 7 of the ad706 are tied together. capacitors c1 & c2 are southern electronics mpcc, polycarb 6 5%, 50 volt + C c4 c3 0.1 m f +v s optional balance resistor networks* 1/2 ad706 1/2 ad706 input c1 c2 + C r1 1m v 0.1 m f r2 1m v r3 1m v r4 1m v Cv s r5 2m v c5 0.01 m f 3 2 4 1 5 6 7 8 r6 2m v c6 0.01 m f figure 25. a 1 hz, 4-pole active filter temperature C 8 c 180 C40 0 +40 60 120 0 C60 C120 C180 offset voltage of filter circuit (rti) C m v +80 +120 without optional balance resistor, r3 with optional balance resistor, r3 figure 26. v os vs. temperature performance of the 1 hz filter plastic mini-dip (n-8) soic (r-8) 8 1 4 5 0.310 (7.87) 0.220 (5.59) pin 1 0.005 (0.13) min 0.055 (1.4) max seating plane 0.023 (0.58) 0.014 (0.36) 0.200 (5.08) max 0.150 (3.81) min 0.070 (1.78) 0.030 (0.76) 0.200 (5.08) 0.125 (3.18) 0.100 (2.54) bsc 0.060 (1.52) 0.015 (0.38) 0.405 (10.29) max 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) 8 14 5 0.430 (10.92) 0.348 (8.84) 0.280 (7.11) 0.240 (6.10) pin 1 seating plane 0.022 (0.558) 0.014 (0.356) 0.060 (1.52) 0.015 (0.38) 0.210 (5.33) max 0.130 (3.30) min 0.070 (1.77) 0.045 (1.15) 0.100 (2.54) bsc 0.160 (4.06) 0.115 (2.93) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 85 4 1 0.1968 (5.00) 0.1890 (4.80) 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20) 0.2284 (5.80) pin 1 seating plane 0.0098 (0.25) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.102 (2.59) 0.094 (2.39) 0.0500 (1.27) bsc 0.0098 (0.25) 0.0075 (0.19) 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45
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